Modele Spice
-tema colocviu-
Universitatea din Pitesti
Facultatea de Electronic , Comunicatii si Calculatoare
Profil : Retele Software si Telecomunicatii
Anul II (2014-2015)-2.2.1-Semestrul al II-lea
Student:Pana Sebastian-Constantin
Sef lucrari :Rducu P. Marian
1.Analiza de curent continuu (.DC)
Fig. 1. Schema amplificatorului diferenial care a fost simulat
Fiierul SPICE de intrare:
CIRCUIT DESCRIPTION*Libraries: * Profile Libraries :* Local Libraries :* From [PSPICE NETLIST] section of C:\Cadence\SPB_16.3\tools\PSpice\PSpice.ini file:.lib "nom.lib" *Analysis directives: .DC LIN V_VIN -50mV 50mV 0.001 .PROBE V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*)) .INC "..\SCHEMATIC1.net" * source TEMA_SPICER_RE1 N02413 N02409 5 TC=0,0 R_RE2 N02409 N02404 5 TC=0,0 R_RC2 N04765 N02451 5k TC=0,0 R_RC1 N04733 N02451 5k TC=0,0 V_VCC N02451 0 20VdcV_VBB N02526 0 10VdcI_IE N02409 0 DC 5mAdc V_VIN N04162 N02526 5mVdcQ_Q1 N04733 N04162 N02413 BC107A Q_Q2 N04765 N02526 N02404 BC107A .END
Fig. 2.Vizualizarea tensiunii Vo n funcie de Vinla temperaturile t1 = 0C, t2 = 50C si t3 = 100C
Fig. 3.Vizualizarea curenilor de colector n funcie de Vinla temperaturiile t1 = 0C, t2 = 50C si t3 = 100C
1. Analiza de curent alternativ
Fig. 4. Schema amplificatorului diferenial care a fost simulat
Fiierul SPICE de intrare:
**** CIRCUIT DESCRIPTION*Libraries: * Profile Libraries :* Local Libraries :* From [PSPICE NETLIST] section of C:\Cadence\SPB_16.3\tools\PSpice\PSpice.ini file:.lib "nom.lib" *Analysis directives: .AC DEC 100 1 10G.PROBE V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*)) .INC "..\SCHEMATIC1.net" **** INCLUDING SCHEMATIC1.net ***** source TEMA_SPICER_RE1 N02413 N02409 10 TC=0,0 R_RE2 N02409 N02404 10 TC=0,0 R_RC2 N04765 N02451 5k TC=0,0 R_RC1 N04733 N02451 5k TC=0,0 V_VCC N02451 0 15VdcV_VBB N02526 0 5VdcI_IE N02409 0 DC 3mAdc Q_Q1 N04733 N04162 N02413 Q2N2222A/ZTX Q_Q2 N04765 N02526 N02404 Q2N2222A/ZTX V_VIN N04162 N02526 DC 0Vdc AC 2mVac **** RESUMING bias.cir ****.END
Fig. 5.Vizualizarea modulului amplificrii n tensiune
Fig. 6.Vizualizarea amplificrii in functie de frecven
Fig. 7.Vizualizarea curenilor de colector
2. Analiza tranzitorie
2.1. Pentru o surs de semnal sinusoidal
Fig. 8.Schema circuitului simulat
Fiierul SPICE de intrare:
**** CIRCUIT DESCRIPTION*Libraries: * Profile Libraries :* Local Libraries :* From [PSPICE NETLIST] section of C:\Cadence\SPB_16.3\tools\PSpice\PSpice.ini file:.lib "nom.lib" *Analysis directives: .TRAN 600us 10ms 0 100n .FOUR 1.5k 5 VC(Q_Q1) VC(Q_Q2) .PROBE V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*)) .INC "..\SCHEMATIC1.net" **** INCLUDING SCHEMATIC1.net ***** source TEMA_SPICER_RE1 N02413 N02409 10 TC=0,0 R_RE2 N02409 N02404 10 TC=0,0 R_RC2 N04765 N02451 5k TC=0,0 R_RC1 N04733 N02451 5k TC=0,0 V_VCC N02451 0 15VdcV_VBB N02526 0 5VdcI_IE N02409 0 DC 3mAdc Q_Q1 N04733 N04162 N02413 Q2N2222A/ZTX Q_Q2 N04765 N02526 N02404 Q2N2222A/ZTX V_V1 N04162 N02526 +SIN 0 2mV 1k 0 0 0**** RESUMING bias.cir ****.END
Fig. 9. Vizualizarea tensiunii Vo
Fig. 10. Vizualizarea tensiunilor de colector
Fig. 10. Vizualizarea curenilor de colector
3.2Pentru o surs de semnal definit prin puncte
Fig. 11. Schema circuitului simulat
Fiierul SPICE de intrare:
**** CIRCUIT DESCRIPTION** Creating circuit file "bias.cir" ** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS
*Libraries: * Profile Libraries :* Local Libraries :* From [PSPICE NETLIST] section of C:\Cadence\SPB_16.3\tools\PSpice\PSpice.ini file:.lib "nom.lib" *Analysis directives: .TRAN 600us 30ms 0 100n .FOUR 1.5k 5 VC(Q_Q1) VC(Q_Q2) .PROBE V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*)) .INC "..\SCHEMATIC1.net" **** INCLUDING SCHEMATIC1.net ***** source TEMA_SPICER_RE1 N02413 N02409 10 TC=0,0 R_RE2 N02409 N02404 10 TC=0,0 R_RC2 N04765 N02451 5k TC=0,0 R_RC1 N04733 N02451 5k TC=0,0 V_VCC N02451 0 15VdcV_VBB N02526 0 5VdcI_IE N02409 0 DC 3mAdc Q_Q1 N04733 N04162 N02413 Q2N2222A/ZTX Q_Q2 N04765 N02526 N02404 Q2N2222A/ZTX V_VIN N04162 N02526 +PWL 5m 2 6.5m 3 8m -2 10m 5 15m 2 20m -2 25m 1 30m 4 .END
Fig. 12. Vizualizarea tensiunii Vin i Vo
2.2. Pentru o surs de semnal de tip pulsatorm
Fig. 11. Schema circuitului simulat
Fiierul SPICE de intrare:
**** CIRCUIT DESCRIPTION*Libraries: * Profile Libraries :* Local Libraries :* From [PSPICE NETLIST] section of C:\Cadence\SPB_16.3\tools\PSpice\PSpice.ini file:.lib "nom.lib" *Analysis directives: .TRAN 600us 50ms 0 0.1u .FOUR 1.5k 5 VC(Q_Q1) VC(Q_Q2) .PROBE V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*)) .INC "..\SCHEMATIC1.net" **** INCLUDING SCHEMATIC1.net ***** source TEMA_SPICER_RE1 N02413 N02409 10 TC=0,0 R_RE2 N02409 N02404 10 TC=0,0 R_RC2 N04765 N02451 5k TC=0,0 R_RC1 N04733 N02451 5k TC=0,0 V_VCC N02451 0 15VdcV_VBB N02526 0 5VdcI_IE N02409 0 DC 3mAdc Q_Q1 N04733 N04162 N02413 Q2N2222A/ZTX Q_Q2 N04765 N02526 N02404 Q2N2222A/ZTX V_V1 N04162 N02526 +PULSE -3 4 2m 7m 5m 2m 10m.END
Fig. 12. Vizualizarea tensiunii Vin i Vo
3. Analiza .TF
Fig. 13. Schema amplificatorului diferenial care a fost simulat
**** SMALL-SIGNAL CHARACTERISTICS
V(N04733,N04765)/V_VIN = -1.727E+02
INPUT RESISTANCE AT V_VIN = 1.142E+04
OUTPUT RESISTANCE AT V(N04733,N04765) = 9.568E+03
4. Analiza FOURIER
Fig. 14.Schema circuitului simulat
FOURIER ANALYSIS TEMPERATURE = 27.000 DEG C
FOURIER COMPONENTS OF TRANSIENT RESPONSE VC(Q_Q1)
DC COMPONENT = 7.596514E+00
HARMONIC FREQUENCY FOURIER NORMALIZED PHASE NORMALIZED NO (HZ) COMPONENT COMPONENT (DEG) PHASE (DEG)
1 1.500E+03 1.321E-01 1.000E+00 -1.305E+02 0.000E+00 2 3.000E+03 3.169E-02 2.399E-01 -1.476E+02 1.134E+02 3 4.500E+03 1.844E-02 1.396E-01 -1.546E+02 2.369E+02 4 6.000E+03 1.318E-02 9.976E-02 -1.576E+02 3.644E+02 5 7.500E+03 1.033E-02 7.820E-02 -1.588E+02 4.936E+02
TOTAL HARMONIC DISTORTION = 3.051306E+01 PERCENT
**** FOURIER ANALYSIS TEMPERATURE = 27.000 DEG C
FOURIER COMPONENTS OF TRANSIENT RESPONSE VC(Q_Q2)
DC COMPONENT = 7.474346E+00
HARMONIC FREQUENCY FOURIER NORMALIZED PHASE NORMALIZED NO (HZ) COMPONENT COMPONENT (DEG) PHASE (DEG)
1 1.500E+03 1.321E-01 1.000E+00 4.950E+01 0.000E+00 2 3.000E+03 3.170E-02 2.399E-01 3.238E+01 -6.662E+01 3 4.500E+03 1.844E-02 1.396E-01 2.545E+01 -1.231E+02 4 6.000E+03 1.318E-02 9.976E-02 2.242E+01 -1.756E+02 5 7.500E+03 1.033E-02 7.817E-02 2.121E+01 -2.263E+02TOTAL HARMONIC DISTORTION = 3.051466E+01 PERCENT
5. Analiza parametric
Fig. 15. Schema circuitului simulat
Fiierul SPICE de intrare:
**** CIRCUIT DESCRIPTION*Libraries: * Profile Libraries :* Local Libraries :* From [PSPICE NETLIST] section of C:\Cadence\SPB_16.3\tools\PSpice\PSpice.ini file:.lib "nom.lib" *Analysis directives: .DC LIN V_VIN -100mV 100mV 0.001 .STEP PARAM VBB LIST -5 0 8 13 .PROBE V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*)) .INC "..\SCHEMATIC1.net" **** INCLUDING SCHEMATIC1.net ***** source TEMA_SPICER_RE1 N02413 N02409 10 TC=0,0 R_RE2 N02409 N02404 10 TC=0,0 R_RC2 N04765 N02451 5k TC=0,0 R_RC1 N04733 N02451 5k TC=0,0 V_VCC N02451 0 15VdcV_VBB N02526 0 {VBB}I_IE N02409 0 DC 3mAdc Q_Q1 N04733 N04162 N02413 Q2N2222A/ZTX Q_Q2 N04765 N02526 N02404 Q2N2222A/ZTX V_VIN N04162 N02526 2.5mVdc.PARAM vbb=5v.END
Fig. 15. Vizualizarea tensiunii de ieire Vo in funcie de Vinla diferite valori ale tensiunii VBB (-5V, 0V, 8V, 13V)
6. Utilizarea a 5 setri ale instruciunii OPTION
Fig. 16. Setarea a 5 setri ale instruciunii .OPTION1
